Monday, July 24, 2017

Digital Circuits Lecture-58: Asynchronous Counters- Part 3

In this lecture, i discussed about how to design ripple counter using D-FF. i.e i designed 2 bit up counter using negative edge triggered D-FF and 3-bit down counter using positive edge-triggered D-FF.

For Video Lecture follow the below link:  
https://youtu.be/e2TbLs0k64A

For Lecture Material download from follow the below link:
http://www.mediafire.com/file/af4dnahqbjoozz9/DE-Lec-58.pdf 




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